The present invention relates to a flash memory, especially, to a flash memory, which comprises an error correction circuit and has high reliability, and to a flash memory used for such as NAND type flash memory and NOR type flash memory.
Among the nonvolatile semiconductor memories, the flash memory can electrically erase and rewrite data for a comparatively large unit. Then, the flash memory is applied to the memory of BIOS (basic I/O system) in the computer system, the memory of the communication rule etc. in a portable telephone, and the memory of the image in the digital camera, etc. as substitution of the hard disk drive. Therefore, when only one bit error is occurred in the data memorized in the flash memory, crash of the computer system, disable of communication of a portable telephone and destroy of data will be occurred.
Then, when high reliability is required to the system, to which the flash memory is applied, the following function is provided for the system, which manages the flash memory. That is, the function is a function to write into the flash memory by adding the check data to the information data to be memorized so as to be able to detect and correct error, to read the information data and the check data and check if the error exists in the information data, and to correct the error when there is an error.
However, there are many cases that the methods of the error correction are different for each system, which manages the flash memories. For example, if the check data is different or the data length is different, the following disadvantages will be caused. That is, when the data written by a certain system A is read with another system B, even when there is no error in data, correct data is changed as it is assumed that data has an error, misdetection of error which is not able to be corrected, as a result, the destruction of data in the system will occur.
On the other hand, there is a method of equipping the error correction circuit in the flash memory. This method is valid, since this method performs the error correction in the flash memory without depending on the system.
However, since the error correction circuit is complex and the area of the circuit becomes large, the size of the chip of the flash memory becomes large, as a result, the high cost will be caused. On the other hand, the increase of the area of the circuit is suppressed for example by sharing the data memory circuit for reading and writing in part of the error correction circuit in U.S. Pat. No. 5,933,436.
In the flash memory in recent years, the multi-level memory to memorize the data of one or more bits in one memory cell is appeared. However, in the flash memory of the multi-level memory, when one memory cell destroys, the error is caused in the data of two or more bits (that is, the burst error is caused).
To correct such a burst error efficiently by short check data, though there is a method of the error correction based on the Reed-Solomon code, a complex circuit is required to specify the error, the area of the circuit becomes large, the size of the chip of the flash memory becomes large, and the high cost will be caused. On the other hand, in U.S. Pat. Nos. 5,621,682 and 5,719,888, the error correction of the multi-level flash memory is performed by the method of the error correction of each bit, and the data of two or more bits written in one memory cell at the same time is relieved by the plurality of check data.
As mentioned above, though the technology of equipping the error correction circuit in the flash memory exists previously, the following flash memory, which comprises the error correction circuit and considers benefits and convenience on practical use, has not been found. For example,    (1) The flash memory, which has interchangeability with flash memory, which conventional error correction circuit is not equipped,    (2) The flash memory, which shortens the time required to specify detection and the error in error,    (3) The flash memory, which shortens the time required to generate check data,    (4) The flash memory, which prevents harm by error correction circuit from being generated when failure analysis is performed in the product test etc., and    (5) The flash memory, which prevents harm by circuit of error correction in the memory from being generated, when error correction is performed on application system side of the flash memory.